Intel expanded its Intel Agilex FPGA portfolio and broadened its Programmable Solutions Group (PSG) offerings to handle the increased demand for customized workloads, including enhanced AI capabilities, and to provide lower total cost of ownership (TCO) and more complete solutions.
Shannon Poulin, Intel corporate vice president and general manager of Programmable Solutions Group, said: “In January, we announced the expansion of our Agilex portfolio to bring the broadly acclaimed Agilex FPGA advantages to a wider audience. We’re eager to share this new FPGA lineup with customers and partners at the annual IFTD event and to detail the opportunities these offerings will accelerate in programmable innovations.”
The expanded Intel Agilex portfolio builds on Intel’s commitment to service all levels of programmable logic needs with FPGAs, including feature advancements that will help developers build solutions more quickly. Intel is also officially releasing Open FPGA Stack (OFS) to open source, the first production adapter based on Intel’s F2000X infrastructure processing unit (IPU) platform and a new Nios V processor.
Intel Agilex 3 devices are power and cost-optimized FPGAs in compact form factors. They are essential building blocks targeted for a range of applications across markets, including system/board monitoring and management, video and vision, protocol expansion, portable imaging and displays, sensor fusion, drives, robotics I/O expansion and others. Intel revealed additional information about two new Intel Agilex 3 FPGA Series: the B-Series and C-Series.
B-Series FPGAs have higher I/O density in smaller form factors at lower power than Intel MAX 10 FPGAs. B-Series FPGAs are targeted for board and system management, including server platform management (PFM) applications.
C-Series FPGAs offer added capabilities for a range of complex programmable logic devices (CPLD) and FPGA applications across vertical markets.
Intel Agilex 5 FPGAs E-Series delivers cost-effective power and performance for embedded edge applications. E-Series FPGAs deliver up to 1.6 times better performance per watt compared to 16nm node competitors. Power capabilities are accomplished using the second-generation Intel Hyperflex FPGA architecture combined with Intel 7 process technology, where transistors are optimized for performance per watt. Intel Agilex 5 FPGAs and SoCs take the industry’s first AI tensor block from Intel’s previous generation high-end offerings and bring them to mid-range FPGAs in Agilex 5 FPGAs, making them an ideal choice for edge AI applications. Intel is working with multiple customers designing E-Series devices as part of its early access program, with plans to begin sampling to early access customers in the fourth quarter of 2023. Intel will begin broad market shipments of E-Series engineering samples to customers in the first quarter of 2024, along with general access of design software. SIMICS, a complete system simulator for pre-silicon and post-silicon software development, testing and system integration, will be available for Agilex 5 with general access in the fourth quarter of 2023.
Launched in May 2023, the Intel Agilex 7 FPGAs with the R-Tile chiplet deliver leading technology capabilities with 2 times faster PCIe 5.0 bandwidth as well as 4 times higher CXL bandwidth per port when compared to other competitive FPGA products. The configurable and scalable architecture of Intel Agilex 7 FPGAs enables customers to quickly deploy customized technology – at scale with hardware speeds based on their specific needs – to reduce overall design costs and development processes and to expedite execution to achieve optimal data center performance.
Developers now have full access to the open source Open FPGA Stack (OFS) hardware code, software code and technical documentation for platform and workload development. The open source OFS offering supports Intel Agilex FPGAs and Intel Stratix 10 FPGAs, enabling hardware and software developers to harness their capabilities for their solution development. Partners, including BittWare, Hitek Systems and SigmaX, have deployable OFS-based platform and application offerings available today.
Infrastructure processing unit (IPU) adoption is accelerating, and new solutions are coming to market, now with publicly available production adapters from Napatech, a provider of SmartNICs and IPUs. Napatech’s F2070X IPU production adapters enable TCO improvements for cloud and networking applications.
Intel is launching a new processor in the Nios V family: the Nios V/c compact microcontroller. The Nios V/c processor is a free, soft-core IP, based on the RISC-V architecture, an open source industry standard. It will initially target all devices supported in Intel Quartus Prime Pro software with a roadmap to many devices supported in Quartus Prime Standard software. Quartus Prime is a programmable logic device design software. Customers will have access to a solution and an unrestricted fast-growing and responsive ecosystem that makes it easier to get their design to market.