Elettronica Plus

SPS IPC Drives 2014 – XilinxERT

Xilinx will demonstrate All Programmable solutions for industrial automation applications at SPS IPC Drives 2014 (Hall 4, Stand 169).  Xilinx, systems companies and ecosystem partners will demonstrate how Xilinx All Programmable FPGAs and SoCs enable differentiated, highly integrated, and system cost optimized solutions for Industry 4.0 factories. Applications include motor control, multilevel inverters, industrial networking, machine vision and functional safety.

Xilinx and Ecosystem Demonstrations

This demonstration showcases a Zynq-7010 All Programmable SoC based three level TNPC implementation with low THD (distortion), high ratio power/volume, three level modulation with very low EMI, low switching loss, and ultra-fast control loops.

This demonstration presents a high performance EtherCAT electric drive with an embedded EtherCAT slave controller IP core from Beckhoff GmbH. It provides a system response time of 62.5 μs and fast control loops for energy efficient motor control.

This demonstration showcases high image processing speed and safe recognition of inspected objects by combining the programmable logic in the Zynq All Programmable SoC with Visual Applets from Silicon Software.

This demonstration displays how HMS selected the Zynq All Programmable SoC for products that integrate Industrial Ethernet. By utilizing Anybus at the base, a comprehensive platform that leverages the capabilities of All Programmable SoCs is demonstrated through the Econ 100 as the first Zynq SoC-based product by IXXAT.

This demonstration showcases how a hardware accelerated Profinet implementation in an FPGA allows the utilization of the full bandwidth of Fast Ethernet (100 Mbit/s) without compromising real-time control loop capabilities.

This demonstration displays zero loss switchover between networks and synchronization between two Netboxes with embedded Bluetooth connectivity for monitoring and maintenance.  Xilinx FPGAs and SoCs with IP core solutions from SoC-e provide low latency at low resource consumption with solutions for HSR (High Availability Seamless Ring), PRP (Parallel Redundancy Ring), and IEEE1588-2008.

This demonstration highlights a safety-oriented motor control system that is based on two Xilinx processors running in dual-core lock-stepping mode at the core of the IDF/IVT Xilinx demonstrator.  The design transforms a single core industrial grade application into a dual-core lockstep system that ensures high reliability and dependability for functional safety systems.

Xilinx Alliance Program Members at SPS/IPC/Drives 2014

This year, nine Xilinx Alliance Program members will demonstrate at SPS/IPC/Drives 2014 including: