Xilinx: machine-learning optimization for accelerated designs

Posted 22 June 2021

Xilinx  introduced Vivado ML Editions, the industry’s first FPGA EDA tool suite based on machine-learning (ML) optimization algorithms, as well as advanced team-based design flows, for significant design time and cost savings.

Vivado ML Editions delivers 5x faster compile time and breakthrough quality of results (QoR) improvements on average 10% on complex designs, compared to the current Vivado HLx Editions.

Vivado ML Editions enables ML-based algorithms that accelerate design closure. The technology features ML-based logic optimization, delay estimation and intelligent design runs, which automates strategies to reduce timing closure iterations.

Xilinx is also introducing the concept of an Abstract Shell, which allows users to define multiple modules within the system to be compiled incrementally and in parallel. This enables an average compile time reduction of 5x and, up to 17x, compared to traditional full system compilation. Abstract Shell also helps protect a customer’s IP by hiding the design details outside of the modules, critical for applications like FPGA-as-a-Service and value-added system integrators.

In addition, Vivado ML Editions improves collaborative design with Vivado IP Integrator, which enables modular design using the new “block design container” feature. This capability promotes a team-based design methodology and allows for a divide-and-conquer strategy to handle large design with multisite cooperation.

Unique adaptability features like Dynamic Function eXchange (DFX) enable more efficient use of silicon resources by loading custom hardware accelerators, dynamically at runtime over-the-air.

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