Most people know Moore’s Law as ‘the number of transistors on a chip doubles every two years’. That interpretation was the consequence of economic considerations. Moore predicted that ‘the number of transistors on a chip will rise exponentially if the surface area stays the same, because that way the cost per unit of computing power for integrated transistors will decrease exponentially over time’.
In my field of expertise – thin-film electronics – we don’t have the same on trying to create smaller transistors as the conventional silicon electronics domain. We started out using 10 micrometer transistors, and have evolved towards 5 and 2 micrometer. Maybe someday we will move to 0.5 micrometer transistors. Hence Moore’s Law, which is inherently tied to transistor scaling, isn’t directly applicable for thin-film electronics. And yet, I strongly believe that a scaling law will come in to play in my field. But instead of Moore’s Law, we should look instead at Wright’s Law. In the 1930s, some 30 years before Moore, Wright posited that the cost of a product falls with cumulative production. In other words, the more we make of a product, the better we become at making it and so production costs drop. You could even say that Moore’s Law is a specific case of Wright’s Law for transistors and electronics products.
Currently, thin-film electronics is facing a classic “chicken-and-egg” situation: it needs volume production to make production costs reasonable, but it needs low production costs before it is manufactured and used in high volumes. Components like thin-film based RFID-tags are set to become a major force in enabling the Internet of Things. By adding cheap tags, you can bring intelligence to everyday objects. Billions of labels will be needed. In the industry, we are trying to find a way to trigger Wright’s Law by bundling together all the various applications for thin-film electronics within the Internet of Things. This should sufficiently boost volumes for thin-film electronics, with the side effect that the price per component will fall thanks to cumulative production.
About the author
Paul L. Heremans received the PhD degree in Electrical Engineering from the University of Leuven, Belgium, in 1990. From 1984 to 1990, he was a research assistant and senior research assistant at the Belgian Fund for Scientific Research (NFWO) working on hot-carrier degradation mechanisms in CMOS. In 1990, he joined the opto-electronics group of imec. He worked on optical interchip interconnects, and on high-efficiency III-V thin-film surface-textured light-emitting diodes. In 1998, he started the organic semiconductor activities at imec. The main focus today is oxide and organic electronics, including circuits, backplanes and memories, as well as organic photovoltaics. Paul Heremans is currently imec fellow and professor at the Electrical Engineering Department of the University of Leuven. He is also director of the large area electronics department at imec, and manages the research program on “Organic and Oxide Transistors” of HOLST Centre, a collaborative research initiative by imec and TNO.